Wherein the gate of the second transistor receives a signal HT(h), the gate of the third transistor receives a signal VT(v+1), wherein one current source is connected between the drains of the first and third P type metal oxide semiconductor field effect transistors and a polarization voltage VDD and wherein the cell output is obtained on the source of the second P type metal oxide semiconductor field effect transistor.Ģ. A digital-to-analog converter, comprising:Īn array of current source cells, each cell having an output connected to a load as a function of an input code converted into a thermometric code including signals HT and VT, wherein logic inverses of the thermometric code are supplied to each cell in the array to selectively connect the cell to the load, and wherein each cell includes a first and a second P type metal oxide semiconductor field effect transistor connected in series, the series connected in parallel with one or more third P type metal oxide semiconductor field effect transistors,

Digital to analog video converter chip